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m02040/43/49/50 evaluation module user guide 02049-EVMD-001-D april, 2005
? 2005 mindspeed technologies tm , inc. all rights reserved. information in this document is provided in connection with mindspeed technologies tm ("mindspeed tm ") products. these materials are provided by mindspeed as a service to its customers and may be used for informational pur- poses only. except as provided in mindspeed?s terms and conditions of sale for such products or in any separate agreement related to this document, mindspeed assumes no liability wh atsoever. mindspeed assumes no respon- sibility for errors or omissions in these materials. mi ndspeed may make changes to specifications and product descriptions at any time, without notice. mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conf licts or incompatibilities arising from future changes to its specifications and product descriptions. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. these materials are provided "as is" withou t warranty of any kind, either express or implied, relating to sale and/or use of mi ndspeed products including liability or war- ranties relating to fitness for a particular purpose, consequential or incidental dam- ages, merchantability, or infringement of any patent, copyright or other intellectual property right. mindspeed further does not warrant the accuracy or completeness of the information, text, graphics or othe r items contained within these materials. mindspeed shall not be liable for any special, indirect, incidental, or consequential damages, including without limitation, lost revenues or lost profits, which may result from the use of these materials. mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. mindspeed cus- tomers using or selling mindspeed products for use in such applications do so at their own risk and agree to fully indemnify mindspeed for any damages resulting from such improper use or sale. 02049-EVMD-001-D mindspeed technologies? revision history revision level date description d final april 2005 update for -14 (3.3v only) and -15 (3.3v/5v) versions of the parts. c final may 2004 add peaking network descri ption for 4.3 gbps. add user instructions to fig. 3-1. b final april 2004 update rampset and rst values a final february 2004 initial release
02049-EVMD-001-D mindspeed technologies? 1 - 1 1.0 operation of evaluation module 1.1 functional description the m02040/43/49/50 evaluation module has been designed to demonstrate the performance of the respective ics, a highly integrated family of limiting amplifiers targeted for use in optical receivers operating up to 4.3 gbps (m02043/49). the evaluation module enable s the user to investigate th e full functionality of the device and facilitate programming of variou s features. the high speed data inputs and outputs are ac-coupled, with controlled impedance lines and good quality sma connectors providing the interface to test equipment. the lamina te (nelco n4000-13) used for the design of this board, offers superior high frequency performance and ensures a good quality transmission medium for the signals delivered to and output from the board. features: ? supports the -14 (3.3v only) and the -15 (3 .3/5v) versions of the parts. either +3.3v or +5v supply selected by a sw itch. no components require changing ? sma connectors for all high -speed i/o connections with ac-coupling to the ic allowing direct connection of inputs and outputs to test equipment ? operates with differential in put levels up to 1200 mvpp ? signal detected (sd) indication ? two analog received signal strength indicator outputs: rssi avg and rssi pp ? versions with pecl outputs (m02040/50) include a regulator to supply the correct pecl termination voltage regardless of the supply voltage programmability ? programmable cml output levels (m02043/49) ? programmable rate select (m02049/50) or dc servo disable (m02040) ? loss of signal threshold level adjustment ? selectable data output power down/squelch operation (jam) ? selectable signal detect led operation test points available ? receive signal strength (rssi avg and rssi pp ) levels ? bandgap reference ? los output ? jam input ? los threshold setting voltage ? ampset voltage that defines cml output levels ? regulated 3.3v output (5v operation) ? all control inputs
operation of evaluation module m02040/43/49/50 evaluation module user guide 02049-EVMD-001-D mindspeed technologies? 1 - 2 figure 1-1. typical 1.25 gbps pecl output (low rate mode) eye diagram figure 1-2. typical 2.5 gbps cml output (high rate mode) eye diagram 10 mv pp differential input 1.25 gbps 160 mv/div 140 ps/div 10 mv pp differential input 2.5 gbps 50 mv/div 70 ps/div
02049-EVMD-001-D mindspeed technologies? 1 - 3 m02040/43/49/50 evaluation module user guide operation of evaluation module figure 1-3. typical 2.5 gbps pecl output (high rate mode) eye diagram figure 1-4. typical 4.3 gbps cml output (high rate mode) eye diagram 10 mv pp differential input 2.5 gbps 160 mv/div 80 ps/div 10 mv pp differential input 4.3 gbps 45 mv/div 50 ps/div
operation of evaluation module m02040/43/49/50 evaluation module user guide 02049-EVMD-001-D mindspeed technologies? 1 - 4 1.1.1 power a single positive 3.3v ( 7.5%) or 5v ( 7.5%) power supply is required to power this board. power is applied via 2 pin head er jp3 for 3.3v operation or jp2 for 5v operation. indication of polari ty on the printed circuit bo ard is provided to enable correct connection. switch s2 selects which ex ternal supply value is provided to the ic. if using 5v, then switch s2 needs to be in the 5v position, likewise for 3.3v. figure 1-5. evaluation board note: note: this evm supports both the 3.3v only version of the parts (-14) and the 3.3/5v version (-15). there are no other operational differences between the two versions. both versions are available on the evm. when fabricated with a -14 version, switch 2, the supply selection switch, will be hard-wired for 3.3v only operation.
02049-EVMD-001-D mindspeed technologies? 1 - 5 m02040/43/49/50 evaluation module user guide operation of evaluation module using the m02043 or m02049 with low cml output levels selected and the led off, the typical operating current of the evm under nominal cond itions of the evm is 32 ma. for the m02040/50 evm, typical operating current under nominal conditions is 55 ma. 1.1.2 i ref r2 is a 12.1 k ? 1% resistor that is used to set an on-chip reference current. this current, typically 100 a, is the main reference for de termining the bias current for the rest of the device. p8 is provid ed to measure the voltage at the i ref input, typically 1.2v. direct capacitive loading of i ref pin could cause instability and is not recommended. 1.1.3 data inputs data is applied via sma edge launched conn ectors j3 and j4. the module is designed to accommodate differential input signals up to 1200 mvpp (600 mvpp single- ended). since the inputs are ac-coupled, the input common mode level is rejected. 1.1.4 cml data output s (m02043 and m02049) the differential data outputs are available at j1 and j2 and can be directly connected to 50 ? test equipment. the outputs are in ternally back terminated with 100 ? pull-ups to the positive supply. the outputs are current mode logic (cml) compatible. the output swing can be selected using s4 and can be either 400 mvpp or 840 mvpp differential. the single ended output current (i ee ) in each mode is typically 6 mapp and 13 mapp. microstrip transmission lines have been used to provide good quality transmission from the device to the test equipment. figure 1-2 and figure 1-4 demonstrate the typical performance with 400 mv (dif ferential) output swing selected. the single ended output voltage swing = i output x (rout || rload) where: i output = 6 ma or 13 m a for lowest overall power consumption the low cml output swing should be selected. note: switch 2, the supply selection switch, does not need to be set to the proper supply location prior to connecting the supply. how- ever, it is important to not connect 5v to the 3.3v supply input (jp3) as this will damage the ic regulator output because 5v will be connected to the ic?s 3.3v regulator output.
operation of evaluation module m02040/43/49/50 evaluation module user guide 02049-EVMD-001-D mindspeed technologies? 1 - 6 1.1.5 pecl data output s (m02040 and m02050) the differential data pecl outputs are avai lable at j1 and j2 and can be directly connected to 50 ? test equipment. u1 is a negative regulator which supplies v cc - 2v to the output 50 ? pecl termination resistors r3 an d r4. the pecl outputs are then ac-coupled to the output smas j1 and j2. when terminated with th e on-board pecl termina tion and connected to 50 ? test equipment, the ac load on the pecl output s requires more curren t than the standard pecl termination of 50 ? to v cc - 2v. this will attenuate the output swing slightly and may lead to slower edge speeds so provision is made for removing the on-board 50 ? to v cc - 2v termination and using a single discrete resistor to ground for the pecl dc termination. this is accomplished by installing 0 ? jumpers or opening r15 and r16. to terminate the pecl outputs of the part with 50 ? to the v cc - 2v regulator output, r15 = 0 ? and r16 is open. when using the ground referenced termination, r15 is open and r16 = 0 ? . in addition, in this condition r4 and r5 should be 150 ? for 3.3v operation or 300 ? for 5v operation. 1.1.6 peak to peak receive si gnal strength indication (rssi pp ) peak to peak receive signal strength indication is provided by this device and can be monitored at p3. this function provides an output voltage that is a logarithmic function of the input signal. the voltage developed at the rssi pp pin is referenced to the ground. the rssi pp voltage is utilized by the loss of sign al function (los). internally this voltage is compared with a us er selectable reference (r_st set ) to determine loss of signal. the typical characteristics of the rssi pp function are presented in figure 1-6 - figure 1-8 . table 1-1. r ampset settings differential voltage swing (mvpp) i output - single ended output current (ma) rampset ( ? ) 400 mv 6 0 840 mv 13 750
02049-EVMD-001-D mindspeed technologies? 1 - 7 m02040/43/49/50 evaluation module user guide operation of evaluation module figure 1-6. typical rssi pp transfer function (full input range) figure 1-7. typical rssi pp transfer function (low input level) differential input level (mv pp ) v(rssi pp ) (mv) 0 25 50 75 100 125 150 175 200 225 250 275 0 25 50 75 100 125 150 175 200 differential input level (mv pp ) v(rssi pp ) (mv) 0 25 50 75 100 125 150 175 200 225 0 5 10 15 20 25 30 35 40 45 50
operation of evaluation module m02040/43/49/50 evaluation module user guide 02049-EVMD-001-D mindspeed technologies? 1 - 8 1.1.7 average receive signa l strength indication (rssi avg ) the rssi avg receive signal strength indication (p1) is a mirrored version of the rxavg in (p9) current from compatible tias or from a photodiode cathode. it sources rather than sinks the current making it compatible with ddmi type interfaces. 1.1.8 loss of signal function (los) loss of signal threshold adju stment and status indication are provided. the evaluation module provides the option to either set the los threshold to one of three preset levels or to adjust the threshold over the fu ll operating range. an external resistance, r st , connected between pin st set and v cc3 (-15 versions) or v cc (-14 versions) enables the user to program the los threshold level. when the differential input voltage is lower than the programmed threshold at st set , los is asserted and status (st) is de-asser ted. increasing the differential input level above the st set threshold de-asserts los and asse rts status. connecting header jp4 will illuminate led d1 when the differentia l input signal is above the los threshold, i.e. "signal present", and turn the led off when loss of signal has occurred. the evaluation module includes a switch, stse t (s1), which allows the user to select one of three fixed los levels or to allow continuous adjustment of the los threshold via potentiometer r1. resistors r8-r10 define the three preset levels. figure 1-9 - figure 1-11 have been included to aid th e selection of the appropriate resistance r st and desired los threshold setting level. more detailed description of both the rssi pp and los functions are included in the respective device data sheet. figure 1-8. typical rssi pp transfer function (log scale) differential input level (mv pp ) v(rssi pp ) (mv) 0 25 50 75 100 125 150 175 200 225 250 275 110100
02049-EVMD-001-D mindspeed technologies? 1 - 9 m02040/43/49/50 evaluation module user guide operation of evaluation module figure 1-9. los characteristic (extended range) figure 1-10. los characteristic (low input signal) threshold level (mv pp ) r st (k ? ) 0 10 20 30 40 50 60 70 80 90 100 110 5.3 5.5 5.7 5.9 6.1 6.3 6.5 6.7 6.9 7.1 7.3 7.5 7.7 7.9 1.25 - 2.5 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c optical hysteresis de-assert assert = 10*log 10 (de-assert/assert) threshold level (mv pp ) r st (k ? ) 0 5 10 15 20 25 30 6.5 6.7 6.9 7.1 7.3 7.5 7.7 7.9 optical hysteresis = 10*log 10 (de-assert/assert) de-assert assert 1.25 - 2.5 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c
operation of evaluation module m02040/43/49/50 evaluation module user guide 02049-EVMD-001-D mindspeed technologies? 1 - 10 1.1.9 jam jam is a cmos compatible input that can be used to inhibit the data outputs when forced to a logic high. if connected directly to the los output pin, then when los is asserted the data outputs will be forced to logic ?one? state ensuri ng that no data is propagated through the system. header jp1 (enable_jam) provides the flexibility to either connect los to jam or leave unconnected. figure 1-11. los characteristic (high input signal) threshold level (mv pp ) r st (k ? ) 20 30 40 50 60 70 80 90 100 110 120 130 5.3 5.5 5.7 5.9 6.1 6.3 6.5 1.25 - 2.5 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c optical hysteresis de-assert assert = 10*log 10 (de-assert/assert)
02049-EVMD-001-D mindspeed technologies? 2 - 1 2.0 evm bill of materials table 2-1. bill of materials qty vendor part number reference designators description 3 panasonic ecj-3yf1a106z c1, c2 , c12 cap ceramic 10v 10uf +80/-20% y5v 1206 6 kemet electronics c0603c104k3ractu c3, c4, c5, c6, c7, c8 cap ceramic 25v 0.1uf 10% x7r 0603 6 kemet electronics c0603c103k5ractu c9, c10, c11, c13, c14 cap ceramic 50v 0.01uf 10% x7r 0603 1 kemet electronics c0603c101k5ractu c15 cap ceramic 50v 100pf 10% x7r 0603 1 kingbright aa3528src d1 3.5x2.8 mm smd chip led vf = 1.85v at id = 20ma 4 rosenberger 32k243-40me3 j1, j2, j3 , j4 sma edge mounted connector 4 sullins electronics pzc02saan jp1, jp2, jp3, jp4 header male 2 pin 100 mil straight single row 1x2 2 murata blm21rk601sn1 l1, l2 in ductor chip ferrite 600 ? at 100mhz, 200ma, 0805 12 keystone 5012 p1- p12 white through_hole pc test point, with eye 1 zetex, inc. zxmp6a13fta q1 60v p-channel enhancement mode mosfet 1 bourns, inc. 3214w-1-502g r1 res adjustable 5 k ? 1/2w 10% 4mm square smd top adjust 1 koa rk73h1jltd1212f r2 res chip thick film 12.1k ? 1/10w 1% 0603 2 koa rk73h1jltd1500f r3, r4 re s chip thick film 150 ? 1/10w 1% 0603 value for 3.3v pecl devices. optionally 50 ? as described below 2 koa rk73h1jltd3000f r3, r4 re s chip thick film 300 ? 1/10w 1% 0603 value for 5v pecl devices. optionally 50 ? as described below
2-2 mindspeed technologies? 02049-EVMD-001-D evm bill of materials m02040/43/49/50 evaluation module user guide 2 koa rk73h1jltd49r9f r3, r4 re s chip thick film 49.9 ? 1/10w 1% 0603 when using the vcc-2v regulator u1 for pecl devices (3.3v or 5v) 1 koa rk73h1jltd7500f r5 (cml devi ces) res chip thick film 750 ? 1/10w 1% 0603 1 yageo america 9c06031a0r00jlhft r5 (pecl devices) res 0.0 ? 1/10w 5% 0603 smd 1 koa rk73h1jltd4752f r6 res chip thick film 4.75k ? 1/10w 1% 0603 2 koa rk73h1jltd1001f r7, r12 r es chip thick film 1.00k ? 1/10w 1% 0603 1 koa rk73h1jltd7502f r8 res chip thick film 7.50k ? 1/10w 1% 0603 1 koa rk73h1jltd6812f r9 res chip thick film 6.81k ? 1/10w 1% 0603 2 koa rk73h1jltd6192f r10 res chip thick film 6.19k ? 1/10w 1% 0603 1 koa rk73h1jltd3012f r11 res chip thick film 3.01k ? 1/10w 1% 0603 2 koa rk73h1jltd1002f r13 res chip thick film 10.0k ? 1/10w 1% 0603 1 koa rk73h1jltd6652f r14 res chip thick film 6.65k ? 1/10w 1% 0603 1 yageo america 9c06031a0r00jlhft r15 res 0.0 ? 1/10w 5% 0603 smd typically open. use zero ? resistor when terminating pecl outputs using the vcc-2v regulat or u1. in this case, r4 and r5 must each be 50 ? . 1 yageo america 9c06031a0r00jlhft r16 res 0.0 ? 1/10w 5% 0603 smd only on pecl output devices when r4 and r5 are 150 ? s for 3.3v or 300 ? for 5v. 1 itw erg components sds-4-014 s1 spst 4 position switch 1 c&k es21mcke s2 dpdt switch 1 itw erg components sdc-1-014 s3 (not installed on pecl devices) spdt switch 1 itw erg components sdc-1-014 s4 (not installed on 2040-xx device) spdt switch 1 linear technology lt1964es5-byp u1 200ma, low noise, low dropout negative regulator 1 mindspeed technologies m0204x-1x u2 limiting amplifier table 2-1. bill of materials qty vendor part number reference designators description
02049-EVMD-001-D mindspeed technologies? 3 - 1 3.0 schematics and layout 3.1 board layout figure 3-1. board layout s4 ampset: select cml output level (2043/49) r1 adjust los thres hold s1 select los thres hold led1 lights for signal detected ac coupled data output jp3 3.3v power supply connection ac coupled data input s4: ampset (2043/49) l = low cml amplitude h = high cml amplitude s1: select los theshold off = not selected 1 = low detect level 2 = medium detect level 3 = high detect level 4 = adjustable detect level using r1 s3: rate select (2049/50) l = low rate h = high rate burst select (2040) servo = servo loop enabled servo = servo loop disabled s3 rate select (2049/50) burst select (2040) jp4: connect to enable sd led (led1) jp1: connect to enable jam jp2 5v power supply connection s2 5v/3.3v power supply selection switch
3-2 mindspeed technologies? 02049-EVMD-001-D schematics and layout m02040/43/49/50 evaluation module user guide 3.2 schematics figure 3-2. schematic diagram g s d pfet out byp adj gnd in bb a a ba bb a a ba sw_sp4 s1b s2b s3b s4b s4a s3a s2a s1a ampset_gnd1 dinn dinp doutn doutp gnd2 iref jam los ratesel rxavgin stset vcc vcc33 gnd3 rssipp rssiavg m02049 16 pin qfn 50 ohm z0 transmission lines signal detected 50 ohm z0 transmission lines m02043/49 only m02040/49/50 only 50 ohm optionally: m02040/50 only m02040/50 only when r15 = 50 ohm low: 5 mvpp los levels (mvpp diff) optional vcc - 2 termination high: 30 mvpp med: 14 mvpp detect level gnd gnd +3.3v only +5v outp outn note: connect only +5v or +3.3v, not both note: two separate supply headers variable threshold l2 6.8uh c6 0.1uf b_vcc5 1 10 9 3 4 11 5 13 14 8 12 6 2 7 17 16 15 u2 gnd jp3 jumper2 jp2 jumper2 vcc-2 r16 0 vref ampset 8 7 6 5 4 3 2 1 s1 3 2 14 s4 p? vcc33 1 2 j2 3 2 14 s3 d1 led gnd jp4 enable_sd_led jp1 enable_jam rxavgin c3 0.1uf 1 2 4 5 6 3 s2 r8 7.5 k r10 6.2 k vcc33 5k r1 5 34 1 2 u1 tp2 1 2 j1 1 2 j3 c15 100pf r15 dni p? vcc p? vcc l1 6.8uh tp4 rate/burst_sel c8 100nf dinn r13 10k dinp c14 10nf r2 12.1k vcc r5 750 c10 10nf c9 10nf c7 100nf r11 3 k r9 6.8 k 10nf c13 r14 6.65k c12 10uf p? vcc tp11 jam tp10 los c11 10nf p? p? tp3 tp9 tp5 tp7 tp6 tp8 tp1 1 3 2 q1 c2 10uf r4 150 c1 10uf c4 0.1uf c5 0.1uf r3 150 r6 4.7k r7 1k r12 1k p? vcc 1 2 j4 rssiavg rssipp stset
www.mindspeed.com general information: (949) 579-3000 headquarters - newport beach 4000 macarthur blvd., east tower newport beach, ca. 92660

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